↔️ 🉑 🤡 Memory on magnetic cores in the Saturn 5 rocket 🍨 💶 💳

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This memory module was improved in the mid-1960s. To create it, components for surface mounting, hybrid modules, and flexible connections were used, which made it an order of magnitude smaller and lighter than the usual computer memory of that time. However, the memory module allowed to store only 4096 words of 26 bits .

Magnetic core memory module. This module stores 4K words from 26 data bits and 2 parity bits. With four memory modules giving a total capacity of 16,384 words, it weighs 2.3 kg and measures 14 cm × 14 cm × 16 cm.

The flight to the moon began on May 25, 1961, when President Kennedy declared that America would land a man on the moon before the end of the decade. For this, the three-stage rocket Saturn 5, the most powerful rocket ever created, was used. Saturn 5 was controlled and controlled by a computer ( here is more about it) of the third stage of the launch vehicle, starting from take-off into Earth’s orbit, and then when moving to the moon. (The Apollo ship at that moment was separated from the Saturn-5 rocket, and the LVDC task was completed).

LVDC is installed in the base frame. Round connectors are visible on the front of the computer. Used 8 electrical connectors and two connectors for liquid cooling

LVDC was just one of several computers on board the Apollo. LVDC connected to a flight control system, a 45-pound analog computer. The Apollo Guidance Computer (AGC) onboard navigation computer directed the spacecraft toward the surface of the moon. The command module contained one AGC, while the lunar module contained a second AGC along with the Abort navigation system, a backup emergency computer.

There were several computers aboard Apollo

Unit Logic Devices (ULD)

LVDC was created using an interesting hybrid technology called ULD, unit load device. Although they looked like integrated circuits, ULD modules contained several components. They used simple silicon crystals, each of which had only one transistor or two diodes. These matrices, together with printed thick-film printed resistors, were mounted on a ceramic plate to realize circuits like a logic gate. These modules were a variant of the Solid Logic Technology (SLT) modules developed for IBM's popular S / 360 series computers. IBM began developing SLT modules in 1961, before integrated circuits became commercially viable, and by 1966, IBM had produced more than 100 million SLT modules per year.

ULD modules were significantly smaller than SLT modules, as can be seen in the photo below, which makes them more suitable for a compact space computer. ULD modules used ceramic coating pads instead of metal pins in the SLT, and had metal contacts on the top surface instead of pins. The clamps on the board held the ULD module in place and connected to these pins.

Why did IBM use SLTs instead of integrated circuits? The main reason was that the integrated circuits were still in their infancy, they were invented in 1959. In 1963, SLT modules had cost and performance advantages over integrated circuits. However, SLT modules were often considered backward compared to integrated circuits. One of the advantages of SLT modules over integrated circuits was that the resistors in SLT were much more accurate than in integrated circuits. During manufacture, the thick film resistors in the SLT modules were thoroughly sandblasted to remove the resistive film until they obtained the desired resistance. SLTs were also cheaper than comparable integrated circuits in the 1960s.

LVDC and related equipment used more than 50 different types of ULD.

SLT modules (left) are significantly larger than ULD modules (right). The size of the ULD is 7.6 mm × 8 mm.

The photo below shows the internal components of the ULD module. On the left on the ceramic plate are visible conductors connected to four tiny square silicon crystals. It looks like a printed circuit board, but keep in mind that it is much smaller than a nail. The black rectangles on the right are thick-film resistors printed on the underside of the plate.

ULD, top and bottom view. Silicon crystals and resistors are visible. While SLT modules had resistors on the upper surface, ULD modules had resistors on the bottom, which increased density as well as cost

In the photo below you can see a silicon crystal from the ULD module, which implements two diodes. The sizes are unusually small; for comparison, sugar crystals are nearby. The crystal had three external connections through copper balls soldered to three circles. The two lower circles (anodes of the two diodes) were doped (darker areas), while the upper right circle was the cathode connected to the base.

Photograph of a two-diode silicon crystal next to sugar crystals

How magnetic core memory works

Magnetic core memory has been the main form of data storage on computers since the 1950s, until in the 1970s it was replaced by semiconductor memory devices. The memory was created from tiny ferrite rings called cores. Ferrite rings were arranged in a rectangular matrix, and from two to four wires passed through each ring to read and write information. Rings allowed to store one bit of information. The core was magnetized with a current pulse through wires passing through a ferrite ring. The direction of magnetization of one core could be changed by sending a pulse in the opposite direction.

To read the core value, the current pulse turned the ring into state 0. If the core was previously in state 1, a changing magnetic field created a voltage in one of the wires penetrating the cores. But if the core was already in state 0, the magnetic field would not change, and the voltage would not rise in the sensing wire. Thus, the bit value in the core was read by resetting it to zero and checking the voltage on the sensing wire. An important feature of magnetic core memory was that the process of reading a ferrite ring destroyed its meaning, so the core had to be “rewritten”.

It was inconvenient to use a separate wire to change the magnetization of each core, but in the 1950s a ferrite memory was developed that works on the principle of matching currents. A four-wire circuit — X, Y, read, ban — has become generally accepted. The technology used a special property of the cores called hysteresis: a small current does not affect the ferrite memory, but a current higher than the threshold value would magnetize the core. When power was supplied with half the required current to one line X and one line Y, only the core in which both lines were crossed received sufficient current for magnetization reversal, while the other cores remained intact.

IBM 360 Model 50. LVDC 50 , 19-32, 19 (0.4826 ), 32 (0,8 ). , , LVDC

The photo below shows one rectangular LVDC memory matrix. 8 This matrix has 128 X-wires running vertically and 64 Y-wires running horizontally, with a core at each intersection. The only reading wire passes through all the wires parallel to the Y-shaped wires. The write wire and the ban wire go through all the wires parallel to the X-wires. The wires intersect in the middle of the matrix; this reduces the induced noise, because noise from one half neutralizes noise from the other half.

One LVDC ferrite memory matrix containing 8192 bits. Connection to other matrices is via pins on the outside

The matrix above had 8192 elements, each of which saved one bit. To preserve the memory word, several basic matrices were added together, one for each bit in the word. The wires X and Y passed through the snake through all the main matrices. Each matrix had a separate line for reading and a separate line of prohibition for writing. LVDC memory used a stack of 14 base matrices (below) that store a 13-bit syllable along with a parity bit.

LVDC stack consists of 14 main matrices

Writing to memory on magnetic cores required additional wires, the so-called prohibition lines. Each matrix had one line of prohibition, piercing all the cores in it. During the recording process, the current passes through the lines X and Y, magnetizing the selected rings (one per plane) to state 1, keeping all 1 in the word. To write 0 at the bit position, the line was fed with half the current opposite to the X line. As a result, the cores remained at 0. Thus, the prohibition line did not allow the core to turn over to 1. Any desired word could be written into memory by activating the corresponding prohibition lines.

LVDC memory module

How is the LVDC memory module physically designed? At the center of the memory module is a stack of 14 ferromagnetic memory matrices shown previously. It is surrounded by several circuit boards with a circuit for controlling the X and Y wires and prohibition lines, bit lines, error detection and the generation of the necessary clock signals.

In general, most of the memory-related circuits are in the computer logic of the LVDC, and not in the memory module itself. In particular, the logic of the computer contains registers for storing the address and data word and the conversion between serial and parallel. It also contains a reading circuit for bit lines, error checking, and clocking.

A memory module indicating key components. MIB (Multilayer Interconnection Board) is a 12-layer PCB

Memory Driver Board Y

The word in memory on magnetic cores is selected by passing the corresponding lines X and Y through the main stack of boards. Let's start with a description of the Y-driver circuit and how it generates a signal through one of the 64 Y-lines. Instead of 64 separate driver circuits, the module reduces the number of circuits by using 8 “high” drivers and 8 “low” drivers. They are connected in a “matrix” configuration, so each combination of high and low drivers selects different lines. Thus, 8 “high” and 8 “low” drivers select one of 64 (8 × 8) Y-lines.

Y driver board (front) controls the Y selection lines in the board stack

In the photo below you can see some of the ULD modules (white) and transistor pairs (golden) that control the Y selection lines. The “EI” module is the heart of the driver: it delivers a constant voltage pulse (E) or passes a constant current pulse (I) through the line of choice. The selection line is controlled by the activation of the EI module in voltage mode at one end of the line and the EI module in current mode at the other end. The result is a pulse with the correct voltage and current sufficient to remagnetize the core. It takes a lot of momentum to turn it over; the voltage pulse is fixed at 17 volts, and the current ranges from 180 mA to 260 mA depending on the temperature.

Macro photo of a driver board Y showing six ULD modules and six pairs of transistors. Each ULD module is labeled with an IBM part number, module type (for example, “EI”) and a code whose value is unclear. The

board also has error tracking (ED) modules that detect when more than one select line Y is activated at the same time. The ED module uses a simple semi-analog solution: it sums the input voltages using a network of resistors. If the resulting voltage is above the threshold, the key is triggered.

Under the driver board is a diode array containing 256 diodes and 64 resistors. This matrix converts the 8 upper and 8 lower pairs of signals from the driver board into connections with 64 Y-lines that pass through the main stack of boards. Flexible cables at the top and bottom of the board connect the board to the diode array. Two flexible cables on the left (not visible in the photo) and two buses on the right (one of them is visible) connect the diode array to the array of cores. The flexible cable, visible on the left, connects the Y-card to the rest of the computer through the I / O board, and the small flexible cable in the lower right corner connects to the clock circuit board.

X memory driver board

The circuit for controlling the X lines is similar to the Y circuit, except that there are 128 X lines and 64 Y lines. Since there are twice as many X-wires, the module has a second X-driver board located under it. Although the X and Y boards have the same components, the wiring is different.

This board, and the one below it, controls the X selected lines in the stack of core cards.

The photo below shows that some components were damaged on the board. One of the transistors is biased, the ULD module is broken in half, and the other is broken. The wiring is visible on the broken module, one of the tiny silicon crystals (on the right) is also visible there. In this photo you can also see traces of vertical and horizontal conductive tracks on a 12-layer printed circuit board.

Close-up of damaged board

Under the driver boards X is a matrix of diodes X, containing 288 diodes and 128 resistors. The X-diode array uses a different topology from the Y-diode board to avoid doubling the number of components. Like the Y-diode board, this board contains components mounted vertically between two printed circuit boards. This method is called "cordwood" and allows you to tightly pack components.

A macro photo of the matrix of diode X shows vertically mounted diodes according to the cordwood technique between 2 printed circuit boards. Two X driver boards are located above the diode board, separated from them by polyurethane foam. Please note that the circuit boards are very close to each other.

Memory amplifiers

The photo below shows the readout amplifier board. Has 7 channels for reading 7 bits from the memory stack; the identical board below processes another 7 bits, a total of 14 bits. The objective of the read amplifier is to detect a weak signal (20 millivolts) generated by a magnetizable core and turn it into a 1-bit output. Each channel consists of a differential amplifier and a buffer, followed by a differential transformer and an output latch. On the left, a 28-core flexible cable connects to the memory stack, leading the two ends of each read wire to the amplifier circuit, starting with the MSA-1 module (memory read amplifier). The individual components are resistors (brown cylinders), capacitors (red), transformers (black) and transistors (gold). The data bits exit the readout amplifier boards through the flex cable on the right.

Prohibition drivers are used to write to the memory located on the underside of the main module. There are 14 barred lines, one for each matrix on the stack. To write 0 bits, the corresponding lock driver is activated, and the current through the inhibit line prevents the core from switching to 1. Each line is driven by an ID-1 and ID-2 module (write inhibit line driver) and a pair of transistors. High-precision 20.8 ohm resistors at the top and bottom of the board control the blocking current. The 14-wire flex cable on the right connects the drivers to the 14 inhibit wires in the stack of core boards.

Prohibition board at the bottom of the memory module. This board generates 14 inhibitory signals used during recording.

Clock driver memory

A clock driver is a pair of boards that generate clock signals for a memory module. As soon as the computer starts the memory operation, various clock signals used by the memory module are generated asynchronously by the module clock driver. The clock drive boards are located at the bottom of the module, between the stack and the ban board, so the board is hard to see.

The clock driver boards are below the main memory stack, but above the lock board

The blue components of the board in the photo above are multi-turn potentiometers, presumably for adjusting time or voltage. Resistors and capacitors are also visible on the boards. The diagram shows several MCD (Memory Clock Driver) modules, but no modules are visible on the boards. It is difficult to say whether this is due to limited visibility, circuit changes or the presence of another board with these modules.

Memory I / O panel

The last memory module board is the I / O panel, which distributes the signals between the memory module boards and the rest of the LVDC computer. The green 98-pin connector at the bottom is connected to the LVDC memory chassis, providing signals and power from the computer. Most of the plastic connectors are broken, due to which the contacts are visible. The distribution board is connected to this connector by two 49-pin flexible cables at the bottom (only the front cable is visible). Other flexible cables distribute the signals to the X-driver board (left), the Y-driver board (right), the reader amplifier board (above), and the prohibition board (bottom). 20 capacitors on the board filter the power supplied to the memory module.

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The LVDC core memory module provided compact, reliable storage. Up to 8 memory modules could be placed in the lower half of the computer. This allowed the computer to store 32 kilovords of 26-bit words, or 16 kilowards in excessive highly reliable "duplex" mode.

One interesting feature of LVDC was that memory modules can be mirrored for reliability. In the "duplex" mode, each word was stored in two memory modules. If an error occurred in one module, the correct word could be obtained from another module. Although this provided reliability, it halved the memory footprint. Alternatively, memory modules may be used in “simplex” mode, with each word being stored once.

LVDC accommodated up to eight CPU memory modules

A magnetic core memory module provides a visual representation of the time when a 5-pound (2.3 kg) module was required to store 8 KB. However, this memory was very perfect for its time. Similar devices ceased to be used in the 1970s with the advent of semiconductor DRAM.

The contents of RAM are saved when the power is turned off, so it is likely that the module still stores software since the last time you used the computer. Yes, yes, you can find something interesting there even after decades. It would be curious to try to recover this data, but a damaged circuit creates a problem, so the contents will probably not be able to be extracted from the memory module for another decade.

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Memory on magnetic cores in the Saturn 5 rocket