🏂🏿 🛌🏼 🧜🏼 Introduction to SSD. Part 4. Physical 🦔 💌 😖

The previous parts of the Introduction to SSD series told the reader about the history of the appearance of SSD drives, their interaction interfaces, and popular form factors. The fourth part will talk about storing data inside drives.

In previous articles in the series:

Storage of data in solid-state drives can be divided into two logical parts: storage of information in one cell and organization of storage of cells.

Each SSD cell stores one or more bits of information . Various physical processes are used to store information . When developing solid-state drives, the following physical quantities were studied for encoding information:

electric charges (including flash memory);
magnetic moments (magnetoresistive memory);
phase states (memory with phase state change).

Electric charge memory

Encoding information using a negative charge underlies several solutions:

Erasable ROM (EPROM);
Electrically Erasable ROM (EEPROM);
Flash memory

Each memory cell is a floating gate MOS transistor that stores a negative charge. Its difference from a conventional MOS transistor is the presence of a floating gate - a conductor in the dielectric layer.

When creating a potential difference between the drain and the source and the presence of a positive potential at the gate, a current will flow from the source to the drain. However, if there is a sufficiently large potential difference, some electrons “break through” the dielectric layer and end up in a floating gate. This phenomenon is called the tunnel effect .

A negatively charged floating gate creates an electric field that interferes with the flow of current from source to drain. Moreover, the presence of electrons in the floating gate increases the threshold voltage at which the transistor opens. At each "recording" in the floating gate of the transistor, the dielectric layer is slightly damaged, which imposes a limit on the number of rewriting cycles of each cell.

Floating-gate MOSFETs were developed by Dawon Kahng and Simon Min Sze of Bell Labs in 1967. Later, when studying defects in integrated circuits, it was noticed that due to the charge in the floating gate, the threshold voltage that opened the transistor changed. This discovery prompted Dov Frohman to begin work on memory based on this phenomenon.

Changing the threshold voltage allows you to "program" the transistors. Transistors with a charge in a floating gate will not open when a voltage is applied to the gate that is greater than the threshold voltage for a transistor without electrons, but less than the threshold voltage for a transistor with electrons. This value is called read voltage .

Erasable Programmable Read-Only Memory

In 1971, an Intel employee, Dov Frohman, created transistor rewritable memory called the Erasable Programmable Read-Only Memory (EPROM) . Writing to memory was carried out using a special device - a programmer. The programmer supplies a higher voltage to the chip than is used in digital circuits, thereby “recording” electrons to the floating gates of transistors, where necessary.

EPROM-memory was not supposed to clean the floating gates of transistors electrically. Instead, it was suggested that the transistors be exposed to strong ultraviolet radiation, the photons of which give the energy to the electrons the energy needed to leave the floating gate. To access the ultraviolet deep into the chip, quartz glass has been added to the case.

EPROM 1971 . : « EPROM. , , Intel . … , , . ». — newsroom.intel.com

EPROM memory is more expensive than previously used “one-time” read-only memory devices (ROM), however, the possibility of reprogramming allows you to debug circuits faster and reduce the development time of new hardware.

Reprogramming the ROM with ultraviolet light was a significant breakthrough, however, the idea of electric rewriting was already in the air.

Electrically Erasable Programmable Read-Only Memory

In 1972, three Japanese people: Yasuo Tarui, Yutaka Hayashi, and Kiyoko Nagai introduced the first Electrically Erasable Programmable Read-Only Memory, EEPROM or E ² PROM. Later, their research will become part of patents for the commercial implementation of EEPROM memory.

Each EEPROM memory cell consists of several transistors:

floating gate transistor for storing bits;
transistor for controlling read-write mode.

This design greatly complicates the wiring of the electrical circuit, so EEPROM memory was used in cases where a small amount of memory was not critical. EPROM was still used to store a large amount of data.

Flash memory

Flash memory combining the best features of EPROM and EEPROM, developed by Japanese professor Fujio Masuoka (Fujio Masuoka), an engineer at Toshiba, in 1980. The first development was called Flash-memory type NOR and, like its predecessors, is based on MOSFETs with a floating gate.

NOR type flash memory is a two-dimensional array of transistors. The gates of the transistors are connected to the word line, and the drains to the bit line. When voltage is applied to the line of words, transistors containing electrons, that is, storing the “unit”, will not open and the current will not flow. By the presence or absence of current on the bit line, a conclusion is made about the value of the bit.

Seven years later, Fujio Masuoka developed NAND type flash memory. This type of memory is distinguished by the number of transistors on the bit line. In NOR memory, each transistor is directly connected to a bit line, while in NAND memory, transistors are connected in series.

Reading from the memory of such a configuration is more complicated: the voltage necessary for reading is supplied to the necessary line of the word, and voltage is applied to all other lines of the word, which opens the transistor, regardless of the level of charge in it. Since all other transistors are guaranteed to be open, the presence of voltage on the bit line depends on only one transistor, to which the read voltage is applied.

The invention of NAND-type flash memory allows for significantly compacting the circuit, accommodating a larger amount of memory at the same size. Until 2007, the amount of memory was increased by reducing the manufacturing process of the chip.

In 2007, Toshiba introduced a new version of NAND memory: Vertical NAND (V-NAND) , also known as 3D NAND. This technology focuses on the placement of transistors in several layers, which again allows you to compact the circuit and increase the amount of memory. However, circuit compaction cannot be repeated indefinitely, so other methods have been explored to increase the stored memory size.

Initially, each transistor stored two charge levels: a logical zero and a logical unit. This approach is called Single-Level Cell (SLC) . Drives with this technology are highly reliable and have maximum rewriting cycles.

Over time, it was decided to increase the volume of drives at the cost of durability. So the number of charge levels in the cell is up to four, and the technology was called Multi-Level Cell (MLC) . Next came the Triple-Level Cell (TLC) and Quad-Level Cell (QLC) . In the future, a new level will appear - Penta-Level Cell (PLC) with five bits in one cell. The more bits are placed in one cell, the greater the volume of the drive at the same cost, but less wear resistance.

Compaction of the circuit by reducing the process technology and increasing the number of bits in one transistor adversely affect the stored data. Despite the fact that the same transistors are used in EPROM and EEPROM, EPROM and EEPROM are able to store data without power for ten years, while modern Flash-memory can "forget" everything in a year.

The use of flash memory in the space industry is difficult, since radiation adversely affects the electrons in floating gates.

These problems prevent Flash from becoming the undisputed leader in the field of information storage. Despite the fact that flash-based storage devices are widespread, studies are underway of other types of memory devoid of these shortcomings, including storing information in magnetic moments and phase states.

Magnetoresistive memory

Coding of information by magnetic moments appeared in 1955 in the form of memory on magnetic cores. Until the mid-1970s, ferrite memory was the main form of memory. Reading a bit from this type of memory led to demagnetization of the ring and loss of information. Thus, after reading a bit, it had to be written back.

In modern developments of magnetoresistive memory, instead of rings, two layers of a ferromagnet are used, separated by a dielectric. One layer is a permanent magnet, and the second changes the direction of magnetization. Reading a bit from such a cell reduces to measuring the resistance when passing current: if the layers are magnetized in opposite directions, then the resistance is greater and this is equivalent to the value “1”.

Ferrite memory does not require a constant power source to maintain the recorded information, however, the magnetic field of the cell can affect the “neighbor”, which imposes a restriction on the circuit compaction.

According to JEDEC, SSDs based on Flash-memory without power should store information for at least three months at an ambient temperature of 40 ° C. An Intel-based chip based on magnetoresistive memory promises to store data for ten years at a temperature of 200 ° C.

Despite the complexity of the development, magnetoresistive memory does not degrade during use and has the best performance among other types of memory, which does not allow to write off this type of memory.

Phase Change Memory

The third promising form of memory is phase transition memory. This type of memory uses the properties of chalcogenides to switch between crystalline and amorphous states when heated.

Chalcogenides are binary compounds of metals with the 16th group (6th group of the main subgroup) of the periodic table. For example, CD-RW, DVD-RW, DVD-RAM, and Blu-ray discs use germanium telluride (GeTe) and antimony (III) telluride (Sb ₂ Te ₃ ).

Research on the use of phase transition for storing information was carried out in the 1960s by Stanford Ovshinsky, but then it didn’t come to commercial realization. In the 2000s, interest in technology reappeared, Samsung patented a technology that allowed switching bits in 5 ns, and Intel and STMicroelectronics increased the number of states to four, thereby doubling the possible volume.

When heated above the melting point, chalcogenide loses its crystalline structure and, cooling, turns into an amorphous form, characterized by high electrical resistance. In turn, when heated to a temperature above the crystallization point, but below the melting point, the chalcogenide returns to the crystalline state with a low resistance level.

Memory with a change in the phase transition does not require “recharging” over time, and is also not susceptible to radiation, in contrast to memory with electric charges. This type of memory can store information for 300 years at a temperature of 85 ° C.

It is believed that the development of Intel, 3D Crosspoint technology (3D XPoint) uses phase transitions to store information. 3D XPoint is used in Intel® Optane ™ Memory drives for which greater durability is claimed.

Conclusion

The physical structure of SSDs has undergone many changes in more than half a century of history, however, each solution has its own drawbacks. Despite the undeniable popularity of Flash-memory, several companies, including Samsung and Intel, are working on the possibility of creating memory on magnetic moments.

Reducing the wear of cells, their compaction and increasing the overall capacity of the drive are the areas that are currently promising for the further development of solid state drives.

You can test the coolest NAND and 3D XPoint drives today in our Selectel LAB .

In your opinion, will the technology of storing information on electric charges be replaced by other, for example, quartz disks or optical memory on salt nanocrystals?

Introduction to SSD. Part 4. Physical