Development of the module on iMX8 from NXP. Features of DDR trace transfer

Greetings, Habr!



Some time ago, NXP introduced the iMX8 processor line. It would be strange to miss an opportunity and not develop a new module. Who cares about the nuances, I ask for a cut (a lot of lightweight pictures).

Introduction (skip)


We have long been ā€œhookedā€ on NXP products, in terms of processors, and we always follow the company's latest updates. When a new product is released, we buy a reference and receive samples through distributors so that programmers immediately begin the development of the chip, and the apparatchiks, upon completion of the first iteration, quickly receive a product model. An important role in all this is played by technical support, which provides SDK and HDK and answers questions from programmers and apparatchiks. While the first ones start the software and begin to adapt it to our tasks, the second ones prepare the second iteration of the board with the corrected errors, if any (for example, the processor module on the iMX7 chip developed by the customer was commissioned from the first iteration, and the second was purely cosmetic, the module on iMX6UL / ULL, first developed for our projects, and later become a separate product,also almost unchanged after the first release). When developing iron, we partially preserve the reference circuitry (provided that this does not harm the quality of the product), so that the docking of the software and hardware is quick and painless. Each new iteration leads to new tests, which not only have to be re-run, but also supplemented, taking into account all the changes. Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.When developing iron, we partially preserve the reference circuitry (provided that this does not harm the quality of the product), so that the docking of the software and hardware is quick and painless. Each new iteration leads to new tests, which not only have to be re-run, but also supplemented, taking into account all the changes. Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.When developing iron, we partially preserve the reference circuitry (provided that this does not harm the quality of the product), so that the docking of the software and hardware is quick and painless. Each new iteration leads to new tests, which not only have to be re-run, but also supplemented, taking into account all the changes. Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.so that the docking of the software and hardware parts is quick and painless. Each new iteration leads to new tests, which not only have to be re-run, but also supplemented, taking into account all the changes. Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.so that the docking of the software and hardware parts is quick and painless. Each new iteration leads to new tests, which not only have to be re-run, but also supplemented, taking into account all the changes. Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.Each new unloading of gerberas from the project requires verification (production of samples and their testing) before starting the series. Usually the developed module is a universal solution and is used in our various projects. Also, some customers ask for module customization, for example, in terms of mounting holes, connector types, configuration, or all at once, to use as a finished product in their future developments.

This is the way that we usually go from the processor output to the appearance of our new product. Sometimes it is simple and fast, but it happens that you have to make serious improvements in a short time, which pop up during testing.

Where to begin?


I will not delve into the preparatory work that precedes the start of the project - this is the coordination of TOR, drawing up a schedule of work, approval of estimates, etc. Iā€™ll talk about the first few steps that can help significantly reduce project development time, using the iMX8 in Altium Designer as an example. It will not be something supernatural and abstruse, I think many do it, but maybe not all.

The most frightening thing, perhaps, when I look at the documentation for a processor or a ready-made circuit, is the prospect of tracing RAM. Sooner or later everyone is faced with this, but, as they say, it is better later, if there is such an opportunity. Well, if you just use one chip in the device, then it can be easier to do the tracing yourself. Below is an example of a DDR3L trace for Xilinx (4-layer board). Designed from scratch, no complaints.



Fig. 1. Trace of DDR3L RAM for Xilinx XC7A35T-1FTG256

But when you need 4 slats, and even on different sides of the board, to reduce the size. The following is an example of a module on the iMX6Q.



Fig. 2. Trace 4 DDR3 RAM chips for NXP iMX6Q (2 on top, 2 on bottom - one below the other)

This is also not an overwhelming task, but I donā€™t see the point in it (I repeat, this is unfortunately not always the case) if it can be simplified while maintaining the quality of a debugged and tested product (in our case, this is a reference that you can "touch" ) At the first iteration, the main thing is that the chip starts up and as many interfaces work as possible. This means that at least the memory is working with us, all the necessary power is supplied and the board stack is selected correctly. Further work will be carried out in the direction of improving the parameters of the board in terms of peripheral performance. So, the first priority for us is memory (operational and non-volatile) and power.

It is not a secret that for a processor that is mass-produced and has support from the manufacturer, as a rule, you can find a full set of documentation (exceptions are products under the NDA, new products without support, etc.). I, at the first stage, will be interested in only a few documents - this is a datasheet, scheme and trace of the reference board. Further, it all depends on in what form this documentation will be transferred and in which CAD system you work. I work only in Altium Designer and therefore I can not use circuits and pcb from manufacturers, since they usually come in different formats. Another problem of converting projects from third-party programs is the mismatch of the fields of the component base, and as a result, the impossibility of unloading the list of elements. And, what is really sad is the lack of connections between the components (not always, but more often).

In this article I want to talk about how you can partially transfer a project to Altium with a converted circuit and pcb.

Altium Designerā€™s built-in package, called Import Wizard, allows you to import files from other CAD systems. Personally, this is accompanied by constant dancing with a tambourine, since in addition to Altium, for example, Allegro should be installed, but I wonā€™t talk about that. This is dedicated to individual videos and articles on the Internet. Conversion, usually, but not always, does not allow you to get a working draft, which I do not need. For our work, we need a pcb file and preferably a schematic. For an example I will use the reference project on iMX8 - "MCIMX8M-EVK-DESIGNFILES".



Fig. 3. Reference Board MCIMX8M-EVK-DESIGNFILES

Since I plan to develop a module, I will not need most of the interfaces - they will be implemented on the motherboard. Even the picture shows that you have to shrink a lot when arranging the components and from pcb I can take only the LPDDR4 trace (MT53B768M32D4NQ-062) and PMIC (power controller for the MC34PF4210A1ES processor). eMMC and SD card are far from the chip, they will need to be re-traced, but this is not a problem.

Component library


For my library from the MCIMX8M-EVK-DESIGNFILES project, I took only a few components, including processor, memory and PMIC.

Let's look at the iMX8 component. Below is a screenshot of the library. MIMX8MQ7DVAJZXA has 14 parts combined into one component. This separation allows you to further distribute the interfaces on different sheets (parts of the circuit, which are combined into one project). For example, ā€œPART Aā€ is all about USB, ā€œPART Dā€ is MIPI DSI, ā€œPART Gā€ is all SAI, etc. Looking ahead, Iā€™ll say that my project has only 12 sheets of schemes, respectively, I combined some of the elements for ease of reading.



Fig. 4. Schematic MIMX8MQ7DVAJZXA

Having such a component after import, I avoided creating it from scratch, thereby significantly reducing the likelihood of errors in the circuit. Now about what will have to be fixed in the parameters of the component.



Fig.5. Schematics MIMX8MQ7DVAJZXA

For different components, the number of parameters can be different, but some fields must be the same so that you can later upload the list of components for ordering and assembly. The fields on the left were imported from the reference. On the right - which I need for further work. Resistors, for example, have more parameters, capacitors even more, etc. In my example, the minimum required set of parameters with the headers I need.

In the same way, I converted and tweaked the RAM and the power controller. Next, I create a new project (approximately knowing how many sheets I will have), transfer parts of the circuits with binding there, and replace the imported components with my own. The result is pieces of circuitry that are very similar to the original. In this article I will not talk about the structure of the project, the relationship between sheets, etc., so let's move on.

The simplest part of the work has been done. Now you can start the second stage - this is the transfer of the library pcb component.

Here it is almost the same as it was before, but instead of the parameters - the layers. In my components I use a fixed set of layers. In addition to the standard ā€œtopā€, ā€œtop overlayā€, ā€œtop pastā€, etc., for example, in ā€œmechanical 1ā€ I draw a component outline, its 3D model and put a ā€œ.Designatorā€ - this is done so that later it was easier to unload the assembly drawing (and others). All extra fields that I do not use are deleted. Thus, I have about 15 of them left, instead of 24, as it was after import. Often for BGA and QFN it is necessary to change the opening of the mask of the pads, make other adjustments to the production capabilities, etc.



Fig. 6. pcb MIMX8MQ7DVAJZXA

Now in the schematic properties you need to connect the component with pcb. To better understand everything written above, you can watch instructional videos on creating a library for Altium.

In the first two preparatory stages, I managed to create library components that can now be used in the project. It took significantly less time than if I was doing it from scratch.

Trace transfer


The third stage is the most difficult - it is the transfer of part of the trace from the reference board to the project. You need to be very careful. Usually, import errors bring up transfer errors (between development environments), so you only need to ā€œborrowā€ what you need, something that would take a lot of time and effort. I especially do not recommend moving vias, polygons, cutouts in polygons, and the rules for DRC (Design -> Rules ...).

The iMX8 is traced on 10 layers, so I will use the same stack with the same sequence of layers. For the convenience of working with the MCIMX8M-EVK-DESIGNFILES project, I will hide all the polygons.



Fig. 7. Reference Board MCIMX8M-EVK-DESIGNFILES. PCB

It looks scary. Very scary. It would seem that on this you can already close the Altium and go cry. For convenience, you can hide unnecessary layers at all, but this will not help radically, but by layers it will look more or less simple. DDR is divorced on 4 layers, but I didnā€™t bring bottom either by accident (see below).



Fig. 8. Tracing LPDDR4 MCIMX8M-EVK-DESIGNFILES by layers

If you have reached this point in your project, then half of the transfer work, or maybe the whole project, has already been done.

Perhaps you have already guessed what needs to be done next? Yes, it remains only to copy layer by layer correctly. I will tell you how I do it to avoid simple mistakes.

First of all, I open the reference board and mine, with the components loaded from it from the circuit on two monitors (this option is most convenient for development). I copy the processor and memory from the reference board to myself (this is necessary in order to expose these components taking into account the existing trace).



Fig. 9. Mutual arrangement of memory and processor (reference on the left)

After that, it is necessary to install the processor and the memory of our board on top of correctly installed ones, and after that just remove the components copied from the reference.



Fig. 10. Correct location of the processor and memory

Excessive communication lines can be temporarily hidden and proceed to transfer the trace directly.

You will need to use two ways to copy wires. The first is the simplest and longest one - copying the conductors one at a time. You do not need to copy all the connections this way - it will take a lot of time, but sometimes it is convenient. For example, take the signals of the shocks on the pads AE14, AD14, AE12 and AD12. Click RMB on the explorer, select the menu item Find Similar Objects ..., in the window that appears, mark the name of the explorer and the layer (you can copy immediately from all layers, including holes).



Fig. 11. Copy one conductor in one layer (top)

Next, press Ctrl + C and set the mouse to the processor pad. We go to our board and press Ctrl + V and paste. We repeat for all four conductors and put holes in the memory pads to go to the bottom - there are resistors. If you made copies in all layers, then the resistors will be easier to install.



Fig. 12. Copying a single conductor

Figure 12. (right) there is a separate conductor (with a cross of the mouse) - this is an example of copying the conductor in all layers with a vias. The essence of the method is that when you copy the conductor and ā€œset it to the padā€, it takes the name of the pad (you need to be careful - if you copy the conductor to another pad, it will take the name of the other pad).

Even now you can transfer all the conductors from the reference to your board yourself, but there is an easier way (there are several of them, but let's focus on one), it is great for copying groups of conductors in one layer. In order to start copying conductors from the second (and next) layer, it is necessary to transfer the top-conductors from all the processor pads, otherwise the connection of the conductors will be broken (we need to transfer vias from top to other layers, so that the conductors are tied to them) .



Fig. 13. Copy all conductors with vias to top

Now I have all the pads removed from the processor and they can be used on other layers. That is, in another layer, I can bind the conductors without fear that they will become NoNet (conductors hanging ā€œin the airā€ that did not pick up). Next I will transfer layer 6 (the third, if you look at Fig. 8.), to show another hack. All the same, select, copy with binding in any hole or pad and paste.



Fig. 14. Copying all conductors with vias from layer 6

What is the hack? So, in addition to the RAM trace, I managed to get the interfaces out of the processor, which will already be grouped in certain parts of the board. In the chip, individual data buses are located in specific places. For example, in iMX8, at the bottom left of the CSI, just above NAND, etc., that is, they will not be able to output them anyway.

After all necessary layers have been transferred, it is necessary to remove all vias and NoNet conductors (when copying five layers, there will be five vias on each board on our board). Then I manually arrange via, at the same time checking all the connections. With some skill, all the transfer work will take several hours.

Bottom


In Fig. 8. I showed the bottom layer, which I also want to transfer. But the main thing in it is not conductors (there are not so many of them), but the arrangement of components. There are 132 elements under the chip and RAM. Usually I donā€™t copy this layer, but simply set the passive as well as on the reference (by opening two boards on different monitors). This option is suitable if you have not changed the size of the components to a larger one, otherwise you will have to tinker.



Fig. 15. Components on the back of the module board



Fig. 16. Final trace under the processor and memory of the signal layers

Afterword


Summing up, I can say that this method of transfer is quite simple (I do not exclude that there are others). If you start with simple cards on 4 layers, then you can quickly learn how to transfer more complex traces, without spending large resources on it. On this, I believe, the article can be completed.

For the ā€œseedā€ Iā€™ll say that on the resulting board there are 156 polygons and, if anyone is interested, I can write an article about how they were laid on this module, what difficulties arose due to the small dimensions (module dimensions 81mm * 58mm) and what should be considered.

Thank you for the attention!

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